Principal High-Speed Analog Layout Design Engineer

Ottawa, Ottawa region

On-site

Full-time

No salary posted6 days ago

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Employment type: Full-time · On-site
Posted: September 30, 2026
Province: Ontario (ON)

Hiring confidence: Sparse posting · 7/100

This posting is missing most of the signals we look for, or shows patterns common to listings that are not actively being filled. Check with the employer before applying. How this is scored

Job Overview

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Job Description Job Description Principal High-Speed Analog Layout Design Engineer About the Role Celero Communication Inc. is an exciting and fast-growing start-up in the semiconductor industry, pushing boundaries with innovative technologies that power the world’s most advanced AI and data center infrastructure. As we scale rapidly, we are looking for a driven and resourceful High-Speed Analog Layout Engineer to be the backbone of our daily operations and a key partner in shaping our company …

This role is based in Ontario. Celero Communications, Inc. is hiring for this full-time position through Jobily, where you can check how well your resume matches the posting before you apply.

Market context

About this role in Ontario

Average salary for Principal High-Speed Analog Layout Design Engineer in Ontario

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NOC code

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Typical qualifications for Canadian employers

Experience in high-speed analog layout design
Proficiency with semiconductor CAD tools
Understanding of design rules and manufacturing constraints
Knowledge of signal integrity and noise management
Experience with layout verification and simulation

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What you'll do

Design and optimize high-speed analog circuit layouts
Collaborate with circuit designers on layout implementation
Ensure compliance with design rules and manufacturing requirements
Perform layout verification and validation
Support AI and data center infrastructure product development
Drive operational excellence in design processes

What you'll need

Experience in high-speed analog layout design
Proficiency with semiconductor CAD tools
Understanding of design rules and manufacturing constraints
Knowledge of signal integrity and noise management
Experience with layout verification and simulation