Principal PLL Design Engineer
- Employment type
- Full-time · On-site
- Posted
- November 10, 2026
- Province
- Ontario (ON)
Hiring confidence: Sparse posting · 7/100
This posting is missing most of the signals we look for, or shows patterns common to listings that are not actively being filled. Check with the employer before applying. How this is scored
Job Overview
This role is based in Ontario. Celero Communications, Inc. is hiring for this full-time position through Jobily, where you can check how well your resume matches the posting before you apply.
Market context
About this role in Ontario
Average salary for Principal PLL Design Engineer in Ontario
We do not have a salary benchmark for this title in Ontario yet. The posting does not state a salary either.
NOC code
This posting has not been matched to a NOC 2021 unit group yet. Use the NOC finder to identify the code from the duties listed above.
Typical qualifications for Canadian employers
- Expert-level PLL design experience
- Deep expertise in high-speed CMOS analog design
- Experience with clocking circuits
- Knowledge of optical transceiver design
- SerDes design experience
Fit check
Is this role right for you?
Top skills this posting asks for:
- PLL Design
- High-Speed CMOS
- Analog Design
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What you'll do
- Design and develop PLL circuits for next-generation AI applications
- Deliver high-speed interconnect technology solutions
- Work on clocking circuits for optical transceivers
- Contribute to high-speed SerDes design and implementation
- Support ADC/DAC system design efforts
What you'll need
- Expert-level PLL design experience
- Deep expertise in high-speed CMOS analog design
- Experience with clocking circuits
- Knowledge of optical transceiver design
- SerDes design experience
- ADC/DAC systems familiarity
- Understanding of high-speed interconnect technology