Principal PLL Design Engineer
- Employment type
- Full-time · On-site
- Posted
- September 23, 2026
- Province
- Ontario (ON)
Hiring confidence: Sparse posting · 0/100
This posting is missing most of the signals we look for, or shows patterns common to listings that are not actively being filled. Check with the employer before applying. How this is scored
Job Overview
This role is based in Ontario. Celero Communications, Inc. is hiring for this full-time position through Jobily, where you can check how well your resume matches the posting before you apply.
Market context
About this role in Ontario
Average salary for Principal PLL Design Engineer in Ontario
We do not have a salary benchmark for this title in Ontario yet. The posting does not state a salary either.
NOC code
This posting has not been matched to a NOC 2021 unit group yet. Use the NOC finder to identify the code from the duties listed above.
Typical qualifications for Canadian employers
- PLL design expertise
- High-speed CMOS analog design experience
- Knowledge of clocking circuits
- Experience with optical transceivers or high-speed interconnect
- SerDes design background
Fit check
Is this role right for you?
Top skills this posting asks for:
- PLL Design
- Analog Design
- High-Speed CMOS
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What you'll do
- Design PLL circuits for next generation optical transceivers
- Develop clocking circuits for high-speed SerDes systems
- Work on ADC/DAC systems
- Deliver high-speed interconnect technology solutions
- Support AI infrastructure applications
What you'll need
- PLL design expertise
- High-speed CMOS analog design experience
- Knowledge of clocking circuits
- Experience with optical transceivers or high-speed interconnect
- SerDes design background
- ADC/DAC system familiarity