CE

Principal SerDes Design Engineer

Ottawa, Ottawa region
On-site
Full-time
No salary posted1 weeks ago
Employment type
Full-time · On-site
Posted
September 23, 2026
Province
Ontario (ON)

Hiring confidence: Sparse posting · 0/100

This posting is missing most of the signals we look for, or shows patterns common to listings that are not actively being filled. Check with the employer before applying. How this is scored

Job Overview

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Job Description Job Description Principal SerDes Design Engineer About the job We are looking for a SerDes Lead Designer, who is seeking an amazing opportunity delivering disruptive High Speed Interconnect Technology to power next generation AI. Candidate will have the opportunity to architect and design SerDes for next generation transceivers. What You Will Do • Define architecture, specifications, and circuit topologies for next-generation SerDes • Overview development of system-level modelli…

This role is based in Ontario. Celero Communications, Inc. is hiring for this full-time position through Jobily, where you can check how well your resume matches the posting before you apply.

Market context

About this role in Ontario

Average salary for Principal SerDes Design Engineer in Ontario

We do not have a salary benchmark for this title in Ontario yet. The posting does not state a salary either.

NOC code

This posting has not been matched to a NOC 2021 unit group yet. Use the NOC finder to identify the code from the duties listed above.

Typical qualifications for Canadian employers

  • Expert knowledge in SerDes design and high-speed interconnect technology
  • Experience architecting and designing transceivers
  • Proficiency in circuit topology and specifications definition
  • System-level modeling expertise
  • Leadership and oversight capabilities

Fit check

Is this role right for you?

Top skills this posting asks for:

  • SerDes Design
  • High-Speed Interconnect
  • Circuit Design

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What you'll do

  • Define architecture, specifications, and circuit topologies for next-generation SerDes
  • Overview development of system-level modeling
  • Architect and design SerDes for next generation transceivers
  • Lead high-speed interconnect technology development
  • Deliver disruptive technology solutions for AI applications

What you'll need

  • Expert knowledge in SerDes design and high-speed interconnect technology
  • Experience architecting and designing transceivers
  • Proficiency in circuit topology and specifications definition
  • System-level modeling expertise
  • Leadership and oversight capabilities
  • Experience in AI/datacenter or similar high-performance domains

About the Company

CE

Celero Communications, Inc.