CE

Principal SerDes Design Engineer

Vancouver, Greater Vancouver
On-site
Full-time
No salary posted3 days ago
Employment type
Full-time · On-site
Posted
November 10, 2026
Province
British Columbia (BC)

Hiring confidence: Sparse posting · 7/100

This posting is missing most of the signals we look for, or shows patterns common to listings that are not actively being filled. Check with the employer before applying. How this is scored

Job Overview

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Job Description Job Description Principal SerDes Design Engineer About the job We are looking for a SerDes Lead Designer, who is seeking an amazing opportunity delivering disruptive High Speed Interconnect Technology to power next generation AI. Candidate will have the opportunity to architect and design SerDes for next generation transceivers. What You Will Do • Define architecture, specifications, and circuit topologies for next-generation SerDes • Overview development of system-level modelli…

This role is based in British Columbia. Celero Communications, Inc. is hiring for this full-time position through Jobily, where you can check how well your resume matches the posting before you apply.

Market context

About this role in British Columbia

Average salary for Principal SerDes Design Engineer in British Columbia

We do not have a salary benchmark for this title in British Columbia yet. The posting does not state a salary either.

NOC code

This posting has not been matched to a NOC 2021 unit group yet. Use the NOC finder to identify the code from the duties listed above.

Typical qualifications for Canadian employers

  • Extensive SerDes design experience
  • High-speed interconnect technology expertise
  • System-level modeling knowledge
  • Circuit topology design experience
  • Leadership capabilities for lead designer role

Fit check

Is this role right for you?

Top skills this posting asks for:

  • SerDes design
  • High-speed interconnect
  • Circuit design

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What you'll do

  • Define architecture for next-generation SerDes
  • Develop specifications for SerDes systems
  • Define circuit topologies for high-speed interconnects
  • Oversee development of system-level modeling
  • Architect and design SerDes for next-generation transceivers
  • Power next-generation AI interconnect technology

What you'll need

  • Extensive SerDes design experience
  • High-speed interconnect technology expertise
  • System-level modeling knowledge
  • Circuit topology design experience
  • Leadership capabilities for lead designer role

About the Company

CE

Celero Communications, Inc.